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Microchip Technology /ATSAML11D15A /RTC /MODE2 /SYNCBUSY

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Interpret as SYNCBUSY

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWRST)SWRST 0 (ENABLE)ENABLE 0 (FREQCORR)FREQCORR 0 (CLOCK)CLOCK 0 (ALARM0)ALARM0 0 (MASK0)MASK0 0 (CLOCKSYNC)CLOCKSYNC 0 (GP0)GP0 0 (GP1)GP1

Description

MODE2 Synchronization Busy Status

Fields

SWRST

Software Reset Bit Busy
ENABLE

Enable Bit Busy
FREQCORR

FREQCORR Register Busy
CLOCK

CLOCK Register Busy
ALARM0

ALARM 0 Register Busy
MASK0

MASK 0 Register Busy
CLOCKSYNC

Clock Synchronization Enable Bit Busy
GP0

General Purpose 0 Register Busy
GP1

General Purpose 1 Register Busy

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data